pub const SLICE_BRAM36: f64 = 52.0;Expand description
BRAM36 tiles of one slice (caches in UltraRAM, S-boxes in LUTs), from two kernel syntheses: build v3 used 202 tiles at 2 slices; build v5 used 1,362.5 at 4 slices, of which 12 lanes × 88 are T-tables, leaving 306.5. The difference, (306.5 − 202) / 2 ≈ 52 per slice, is the slice’s FIFOs, frame buffers and Merkle RAMs.
An earlier value, 11 (a routed link’s 555 tiles minus the 544 its block-RAM caches used), missed those buffers. Undercounting block RAM is what sank build v4, so this figure errs high: with it the fixed part (Ed25519 87 + glue 28 = 115) slightly exceeds what v3 implies (98).
Unit: BRAM36 tiles per slice.