Function engine_kernel 

pub fn engine_kernel<const TABLE_MASK: usize>(
    clock_reset: ClockReset,
    input: EngineInput,
    q: EngineQ<TABLE_MASK>,
) -> (EngineOutput, EngineD<TABLE_MASK>)

The kernel’s wiring and register file.

Every clock this function:

1. advances the tick counter;
2. sums progress from the writers and ORs fault flags from every child, and finishes the run when all count frames are acknowledged;
3. serves at most one AXI4-Lite register write and one register read;
4. wires the children together: reader → slices, slices ↔ certificate unit, slices → writers (every slice link through crate::relay registers), and the HBM ports to the outside.

• Inputs: clock_reset, the EngineInput pins, and q, the registered outputs of every child (q.control, q.reader, q.cert, q.slices[s], q.writers[s]).
• Outputs: the EngineOutput pins and EngineD, the next control value and every child’s inputs for this clock.
• Timing: in RHDL, d carries each child’s inputs and q its outputs. The AXI4-Lite outputs come only from the registered control state, and the HBM outputs are the children’s outputs passed through. A register write takes effect on the clock after both its address and data are latched; a register read answers on the clock after the address.