pub const HARAKA_TABLE_LANE_BRAM36: f64 = 88.0;Expand description
BRAM36 tiles of one T-table lane: 176 dual-port BRAM18 ROMs (32 per table round in rounds 3–6, 24 in rounds 7–8 where 16 bytes are never observed). Build v5 synthesized 2,135 RAMB18 for its 12 lanes and caches.