Constant END_DELAY 

pub const END_DELAY: i32 = _; // 62i32

Cycles from a chain’s issue until its commitment word is readable.

The chain engine takes SLICE_CHAIN_LATENCY cycles (three chain-hash lanes in series); two more cycles cover the registers on the way from the engine output through the packer into the commitment RAM. Haraka: 3 × 20 + 2 = 62. BLAKE3: 3 × 28 + 2 = 86. SHA-512: 3 × 82 + 2 = 248. The schedule solver needs this number to know when a commitment block’s chain ends are all present.