Module wire 

Port and data types at the signer boundary.

These are plain [Digital] structs: a 512-bit message/signature, a 256-bit scalar or key, a signing request with its tag, a verification request, and the input and output ports of crate::ed25519_sign_core::Ed25519SignCore. Their bit layouts match the original rhdl_ed25519_fast_core types of the same names, so a design wired to that crate’s signer can switch to this one without changing its port wiring.

Every multi-word value is little-endian twice over: word zero is the least significant 64 bits, and within a word byte zero is the least significant byte. That is the byte order of RFC 8032 encodings, so a 32- or 64-byte buffer maps onto the words with no reordering.

Structs

CachedSignIn

Signer input port (the CachedSignIn layout shared with the original cached-key signer, so either core can sit behind the same wiring).

CachedSignOut

Signer output port (the CachedSignOut layout).

ScalarWords

A scalar or 32-byte value as four little-endian 64-bit words.

SignRequest

Signing request accepted by the cached-key fixed-64 datapath.

VerifyRequest

Verification request: exactly 64 message bytes, a public key and a signature (the VerifyRequest layout of rhdl_ed25519_fast_core).

Words512

A 512-bit value represented as little-endian 64-bit words.