Module load 

Bounded replacement for upstream load/load.cpp.

The memory port transfers exactly one aligned eight-byte word per request, with at most one outstanding request. It is a single-beat AXI64 read subset with ARLEN=0, ARSIZE=3, and ARBURST=1 (INCR). Reset must also cancel/drain outstanding bus transactions before this component is restarted. count and capacity are word counts. Bit 31 of count is rejected to keep the upstream signed-int count domain explicit; negative counts are errors. Transfers occur on rising edges with valid and ready asserted. Producers hold valid and payload until transfer; reset suppresses handshakes. A malformed response without eventual LAST cannot finish draining and requires external recovery. Loader completion does not imply application commitment.

Structs

Load

Finite producer with explicit bounds and backpressure.

LoadIn

Start is accepted only when start_ready; repeated asserted starts are separate commands. Capacity describes accessible words starting at base.

LoadMemoryIn

Memory answers; response data is stable while valid and not ready.

LoadMemoryOut

One aligned 64-bit read at a byte address.

LoadOut

Done is a one-cycle pulse on success or failure. Fault stays high until the next accepted start or reset. Emitted counts accepted output words.

LoadState

Finite-transfer registers; output ownership ends only at the consumer handshake.

Functions

load_kernel

Move one word from memory to the consumer before requesting the next. This deliberately trades overlap for exact bounds and simple ownership: there is never a second response competing for the one-word output register.