Struct ToggleLink 

pub struct ToggleLink<T: Digital> { /* private fields */ }

A valid/ready link for rare, wide items, built from plain registers.

Why not a relay pipe

A Relay station chooses between its main and aux registers, which costs a LUT per data bit per station. For the certificate path that came to 4,760 LUTs per slice in build v12 (19,037 of its 410,003), to carry one certificate per 128 signatures. This link carries the same handshake with no per-bit logic: the data only ever moves forward, through plain registers, and one bit in each direction carries the protocol.

The protocol: a toggle (two-phase) handshake

  sender side                                         receiver side
  item ─▶ [held] ─▶ [fwd 0] ─▶ [fwd 1] ─────────────▶ data, valid = seq != last
          [seq ] ─▶ [seq 0] ─▶ [seq 1] ──────────────┘
  ready = seq == ack ◀── [ack 1] ◀── [ack 0] ◀── [last] ◀── taken

• The sender side loads an item into held and flips seq, but only when seq == ack: the receiver has taken everything sent so far.
• held and seq travel forward together through TOGGLE_STAGES registers. The receiver sees a new item while the delayed seq differs from last, the seq of the item it took most recently.
• Taking the item copies the delayed seq into last, which ends valid at the next clock and travels back as ack.

held keeps the item until the receiver has taken it, so the forward registers need no enable and no reset: they copy every clock. Every output comes from a register or compares two registers. One item makes a round trip in 2 * TOGGLE_STAGES + 2 clocks (6 with two stages), so this link suits items that arrive far less often than that.

Trait Implementations

impl<T: Clone + Digital> Clone for ToggleLink<T>

fn clone(&self) -> ToggleLink<T>

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl<T: Debug + Digital> Debug for ToggleLink<T>

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl<T: Digital> Default for ToggleLink<T>

fn default() -> Self

Empty and ready after reset; data registers don’t-care.

impl<T: Digital> Synchronous for ToggleLink<T>

type S = (<ToggleLink<T> as SynchronousDQ>::Q, <DFF<T> as Synchronous>::S, <DFF<bool> as Synchronous>::S, <[DFF<T>; 2] as Synchronous>::S, <[DFF<bool>; 2] as Synchronous>::S, <DFF<bool> as Synchronous>::S, <[DFF<bool>; 2] as Synchronous>::S)

The simulation state type. This type is used to represent the internal state of the circuit during simulation. It must be PartialEq and Clone. It holds whatever state is needed to compute the output of the circuit given it’s input. This state is typically auto-derived by the Synchronous derive macro, and it’s typically a struct containing the states of all the subcircuits, along with their last know outputs.

fn init(&self) -> Self::S

Initialize the simulation state. This method returns the initial state of the circuit for simulation. This is typically auto-derived by the Synchronous derive macro, and it typically initializes the states of all the subcircuits to their initial states.

fn children( &self, parent_scope: &ScopedName, ) -> impl Iterator<Item = Result<Descriptor<SyncKind>, RHDLError>>

Iterate over the child circuits of this circuit.

fn sim( &self, clock_reset: ClockReset, input: <Self as SynchronousIO>::I, state: &mut Self::S, ) -> <Self as SynchronousIO>::O

Simulate the circuit given it’s input, clock reset, and current state.

fn descriptor( &self, scoped_name: ScopedName, ) -> Result<Descriptor<SyncKind>, RHDLError>

Provides run time reflection of the circuit.

impl<T: Digital> SynchronousDQ for ToggleLink<T>

type Q = ToggleLinkQ<T>

The type of the internal data output from the children of the circuit.

type D = ToggleLinkD<T>

The type of the internal data input to the children of the circuit.

impl<T: Digital> SynchronousIO for ToggleLink<T>

type I = PipeIn<T>

The type of the input to the circuit.

type O = PipeOut<T>

The type of the output from the circuit.

type Kernel = toggle_link_kernel<T>

The type of the kernel function used to compute the output and feedback. The kernel function must be a synthesizable function that takes a clock and reset signal, the input signal, and the feedback signal Q, and produces the output signal and feedback signal D.