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Module ed25519_sign_core

Module ed25519_sign_core 

Source
Expand description

Ed25519SignCore: the Ed25519 signer with the CachedSignIn / CachedSignOut ports, for embedding in another RHDL design (DSig’s certificate unit uses Ed25519SignCoreSmall).

Ed25519SignCoreSmall = Ed25519SignCore<1, 1, 1, 0>: one fused fixed-base machine, one SHA-512 ring, one scalar ring, 128 sign contexts. Embed it as a child field; never import generated Verilog.

The wrapper adds no logic of its own beyond port renaming: it fixes the controller’s context width to SMALL_CTX_BITS, disables the external SHA-512 port (SH = 0), and saturates the 12-bit in-flight count to the 8-bit occupancy field of the original port layout.

ⓘ
#[derive(Clone, Debug, Synchronous, SynchronousDQ, Default)]
pub struct MyDesign {
    signer: rhdl_ed25519_scalable_core::Ed25519SignCoreSmall,
}

§Handshake

  • load_key_valid + key_seed: load a seed when load_key_ready (high only when idle and no key is loaded; clear_key with all requests drained before loading another).
  • valid + request (64-byte message, 16-bit tag): accepted when ready is high that cycle. ready is not high every cycle even with room; offer whenever it is.
  • valid out is a one-cycle pulse with tag and signature (R ‖ S): no backpressure, at most one per cycle, possibly out of order.
  • occupancy: requests in flight, saturated at 255. internal_error is a sticky invariant violation.

The message is signed exactly as given (no prehash, no domain prefix).

§Performance (native simulation, 205 MHz)

QuantityValue
key load21,509 cycles, once
one request, in → out22,240 cycles
saturated~895 cycles/signature (~229k/s) with ~32 in flight
CLB LUT / FF / DSP / BRAM3626,963 / 29,973 / 248 / 88 (+2 BRAM18), Vivado routed out of context
timing at 4.878 nsWNS −0.273 ns before the scalar-ring fix; re-route pending
lowering as a child~190 MB with the HDL-only export (crate::export)

Structs§

Ed25519SignCore
CachedSignCore-compatible wrapper around ScalableSignCore.

Constants§

SMALL_CTX_BITS
Sign-context index width of Ed25519SignCore: 128 contexts. Fused mode admits at most 32 * NFB requests (one credit per fixed-base context), so more contexts would only cost BRAM.

Functions§

ed25519_sign_kernel
Port adapter for Ed25519SignCore.

Type Aliases§

Ed25519SignCoreSmall
The small size: one fused fixed-base machine, one SHA-512 ring, one scalar ring, no batch-compress machine.